Project : dart
Section: Contracts and Grants with Industry
Prompt2Implementation itea Project
Currently, methodologies and tools are only available for high level specification of complex systems using UML or other application-oriented languages. Ensuring coherence between the design and implementation phases is therefore a major issue. The traditional approach –validating real-time embedded applications using hand-made optimisation very late in the process– requires the availability of all hardware and software, is expensive and increases precious time to market. There is clearly a need for integrated methods and tools.
Partners:
Esterel Technologies, Thales Communication France, INRIA Rocquencourt (AOSTE), Nokia, Tampere University of Technology, University of Turku.
The goal of Prompt2Implementation is to define a design methodology for Real-Time Embedded Systems, based into an immersion of the partners previous know-how and existing skills into a relevant extension of the UML unified modeling framework. The resulting RTE profile will address the HW/SW codesign domain that is currently hardly addressed in the UML community.
This objective will require the following action steps:
Provide the list of formalisms and methods used so-far by P2I partners, and study their common features as well as their complementarities;
Extract the conceptual modeling needs to usefully cover the range of techniques aimed at;
Study the existing UML representation (or lack of) for this RTE domain, and provide tentative solutions. Currently we shall not face the standardization compromise issues;
Demonstrate the methodology (in its current, possibly transient state) on a non-trivial case study involving several partners.
We feel that such a specific profile, taking appropriately into account both the characteristic features of the aimed architectural platform and the characteristics of the application data dependencies at the proper level of details, could be exploited to benefit specific tools. In particular it could allow early verification and validation (sometimes on non-functional aspects), automatic code generation and automatic optimized code partitioning on heterogeneous embedded hardware target.
The contribution of DaRT in this project concerns the definition of profiles for application and architecture models. We are working on data low control flow integration in a UML profile. We exploit our MDA transformation tools to interact with Scade and Syndex tools
